TitleProduct

40GBASE-SR4 QSFP+ 40GBASE-CSR4 4 lanes MMF MPO connector transceiver up to 100m(OM3) or 150m (OM4) c

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    Negotiable

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  • Total supply:

  • Delivery term:

    The date of payment from buyers deliver within days

  • seat:

    Beijing

  • Validity to:

    Long-term effective

  • Last update:

    2018-08-04 07:16

  • Browse the number:

    265

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Company Profile

Shenzhen SKY Optics Technology Co.,Limited

By certification [File Integrity]

Contact:sikai(Mr.)  

Email:

Telephone:

Area:Beijing

Address:Beijing

Website:http://www.compatible-sfp.com/ http://www.yabofashion.com/com/sikai/

PRODUCT DETAILS

QSFP+ SR4
40Gb/s QSFP+ SR4 Optical Transceiver


Features

● 4 independent full-duplex channels

● Up to 11.2Gb/s data rate per channel

● MTP/MPO optical connector

● QSFP+ MSA compliant

● Digital diagnostic capabilities

● Up to 100m transmission on OM3 multi-mode ribbon fiber

● CML compatible electrical I/O

● Single +3.3V power supply

● Operating case temperature: 0~70°C

● XLPPI electric interface

● Maximum power consumption 1.5W

● RoHS-6 compliant


Applications

● Rack to Rack

● Data Center

● Infiniband QDR, DDR and SDR

● 40G Ethernet


General Description
This product is a parallel 40Gb/s Quad Small Form-factor Pluggable (QSFP+) optical module. It provides increased port density and total system cost savings. The QSFP+ full-duplex optical module offers 4 independent transmit and receive channels, each capable of 10Gb/s operation for an aggregate data rate of 40Gb/s on 100 meters of OM3 multi-mode fiber.


An optical fiber ribbon cable with an MTP/MPO connector can be plugged into the QSFP+ module receptacle. Proper alignment is ensured by the guide pins inside the receptacle. The cable usually can not be twisted for proper channel to channel alignment. Electrical connection is achieved though a z-pluggable 38-pin IPASS® connector.


The module operates by a single +3.3V power supply. LVCMOS/LVTTL global control signals, such as Module Present, Reset, Interrupt and Low Power Mode, are available with the modules. A 2-wire serial interface is available to send and receive more complex control signals, and to receive digital diagnostic information. Individual channels can be addressed and unused channels can be shut down for maximum design flexibility. 


The product is designed with form factor, optical/electrical connection and digital diagnostic interface according to the QSFP+ Multi-Source Agreement (MSA). It has been designed to meet the harshest external operating conditions including temperature, humidity and EMI interference. The module offers very high functionality and feature integration, accessible via a two-wire serial interface.


Functional Description
This product converts parallel electrical input signals into parallel optical signals, by a driven Vertical Cavity Surface Emitting Laser (VCSEL) array. The transmitter module accepts electrical input signals compatible with Common Mode Logic (CML) levels. All input data signals are differential and internally terminated. The receiver module converts parallel optical input signals via a photo detector array into parallel electrical output signals. The receiver module outputs electrical signals are also voltage compatible with Common Mode Logic (CML) levels. All data signals are differential and support a data rates up to 10Gb/s per channel. Figure 1 shows the functional block diagram of this product.


A single +3.3V power supply is required to power up the module. Both power supply pins VccTx and VccRx are internally connected and should be applied concurrently. As per MSA specifications the module offers 7 low speed hardware control pins (including the 2-wire serial interface): ModSelL, SCL, SDA, ResetL, LPMode, ModPrsL and IntL. 


Module Select (ModSelL) is an input pin. When held low by the host, the module responds to 2-wire serial communication commands. The ModSelL allows the use of multiple QSFP+ modules on a single 2-wire interface bus – individual ModSelL lines for each QSFP+ module must be used.


Serial Clock (SCL) and Serial Data (SDA) are required for the 2-wire serial bus communication interface and enable the host to access the QSFP+ memory map.


The ResetL pin enables a complete module reset, returning module settings to their default state, when a low level on the ResetL pin is held for longer than the minimum pulse length. During the execution of a reset the host shall disregard all status bits until the module indicates a completion of the reset interrupt. The module indicates this by posting an IntL (Interrupt) signal with the Data_Not_Ready bit negated in the memory map. Note that on power up (including hot insertion) the module should post this completion of reset interrupt without requiring a reset.


Low Power Mode (LPMode) pin is used to set the maximum power consumption for the module in order to protect hosts that are not capable of cooling higher power modules, should such modules be accidentally inserted.


Module Present (ModPrsL) is a signal local to the host board which, in the absence of a module, is normally pulled up to the host Vcc. When a module is inserted into the connector, it completes the path to ground though a resistor on the host board and asserts the signal. ModPrsL then indicates a module is present by setting ModPrsL to a "Low" state.


Interrupt (IntL) is an output pin. Low indicates a possible module operational fault or a status critical to the host system. The host identifies the source of the interrupt using the 2-wire serial interface. The IntL pin is an open collector output and must be pulled to the Host Vcc voltage on the Host board.


Optical Characteristics

Parameter

Symbol

Min.

Typical

Max

Unit

Notes

Transmitter

Center Wavelength

λC

840

850

860

nm


RMS Spectral Width

∆λrms


0.5

0.65

nm


Average Optical Power, each Lane

PAVG

-7.6


1.0

dBm

1

Optical Modulation Amplitude (OMA), each Lane

POMA

-5.6


3.0

dBm

2

Difference in Launch Power between any Two Lanes (OMA)

Ptx,diff



4.0

dB


Peak Power, each Lane

PPT



4.0

dBm


Launch Power in OMA minus Transmitter and Dispersion Penalty (TDP), each Lane

OMA-TDP

-6.5



dBm


TDP, each Lane




3.5

dB


Extinction Ratio

ER

3.0



dB


Relative Intensity Noise

RIN



-128

dB/Hz

12dB reflection

Optical Return Loss Tolerance

TOL



12

dB


Encircled Flux


>86% at 19um
         <30% at 4.5um         



Transmitter Eye Mask Definition {X1, X2, X3, Y1, Y2, Y3}


0.23, 0.34, 0.43, 0.27, 0.35, 0.4



Average Launch Power OFF Transmitter, each Lane

Poff



-30

dBm


Receiver

Center Wavelength

λC

840

850

860

nm


Damage Threshold, each Lane

THd

3.4



dBm

3

Average Power at Receiver Input, each Lane


-9.5


2.4

dBm


Receiver Reflectance

RR



-12

dB


Receive Power (OMA), each Lane




3.0

dBm


Stressed Receiver Sensitivity (OMA), each Lane




-5.4

dBm

4

Receiver Sensitivity (OMA), each Lane

SEN



-7.5

dBm


Peak Power, each Lane

PPR



4.0

dBm


LOS Assert

LOSA

-30



dBm


LOS Deassert

LOSD



-12

dBm


LOS Hysteresis

LOSH

0.5



dB


Conditions of Stress Receiver Sensitivity Test (Note 5):

Vertical Eye Closure Penalty, each Lane



1.9


dB


Stressed Eye J2 Jitter, each Lane



0.3


UI


Stressed Eye J9 Jitter, each Lane



0.47


UI


OMA of each aggressor lane



-0.4


dBm



Notes:

1. The maximum transmitter average optical power of 1.0 dBm is well within the guardband of receiver overload specifications of commercially available 10GBASE-SR SFP+ transceivers.

2. Even if the TDP<0.9 dB, the OMA min must exceed the minimum value specified here.
3. The receiver shall be able to tolerate, without damage, continuous exposure to a modulated optical input signal having this power level on one lane. The receiver does not have to operate correctly at this input power.

4. Measured with conformance test signal at receiver input for BER = 1x10-12.
5. Vertical eye closure penalty and stressed eye jitter are test conditions for measuring stressed receiver sensitivity. They are not characteristics of the receiver.

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